Complementary Memresistive Switch Based Realization of Delay and Toggle Flip-Flop

In-memory computing architecture is gaining momentum to replace the classical Von Neumann architecture with high computational speed. Memristor is a suitable candidate to implement memory and logic in the same platform for performing in-memory computation for high execution speed and performance. This work addresses flip-flop designs using Complementary Memristive switch (CRS) which shows better results in comparison with the earlier designs implemented using different memristive logic styles. The proposed flip-flops are simulated using SPICE which utilizes less number of execution steps with lower count of memristive elements. The power consumption in proposed Delay flip-flop and Toggle flip-flop using CRS reduced by 46.8% and 51.53% as compared to the MAGIC In-memory design which uses pure memristive elements.