Simultaneous Multiprocessing on FPGA-CPU Heterogeneous Chips

Heterogeneous chips integrating different core architectures, including multi-core CPUs and fast-processing FPGAs, are providing a promising solution for running computationally-intensive applications. Schedulers can help assign dataset proportionally to the compute units and hence improve execution performance and/or energy consumption. The emergence of high-level software-defined heterogeneous design tools has made it possible to merge these schedulers into the design environment. In this paper, we introduce and develop two schedulers for parallel execution of applications on heterogeneous platforms. One scheduler is designed to adaptively assign data chunks to CPU cores depending on the throughputs of compute units on an FPGA-CPU chip. This enables balanced execution of an application on the platform. The second scheduler introduced has a simpler design where dataset is processed from two sides by different devices, without requiring the overheads associated with traditional schedulers. The evaluation of these two schedulers using four benchmark applications on a Zynq UltraScale+ ZCU102 device shows that the latter scheduling method can improve throughput by a factor of 1.38. Similar improvement can be observed in energy consumption too.