Monolithic Integration of Lateral HV Power MOSFET with LV CMOS for SiC Power IC Technology

This paper reports the design and process flow for monolithic integration of lateral high voltage (HV) power MOSFET with low voltage (LV) CMOS circuits for SiC Power IC technology. The reported devices and circuits are fabricated on a N−/N+ 4H-SiC substrate at 150mm, production grade-Analog Devices Inc. (ADI) Hillview fabrication facility located in San Jose. The static performance characteristics of HV NMOS and LV CMOS are reported. For future high temperature applications, the static performances are fully characterized and are reported up to 200°C. Finally, to validate the fabricated CMOS, a 5-stage ring oscillator is also demonstrated.