Selected Harmonic Elimination Pulse Width Modulation for Open-end Winding Motors with a Common DC link

This paper presents an implementation method for selective harmonic elimination pulse width modulation for dual inverters feeding an open-end winding motor. The modulation method is intended for dual inverters with a common DC link, where the zero sequence current must be suppressed by proper modulation. Selective harmonic elimination is highly effective in providing improved power quality at low apparent switching frequency, which makes the proposed modulation appealing especially for high-speed drive applications. The proposed modulation method and carrier based pulse width modulation were simulated in a high-speed equivalent circuit. The simulation study focuses on using a static load to present power quality produced by the modulators without load or control interactions. It was found that the proposed method was able to shift the harmonic peaks of the load current from the apparent switching frequency to a higher band and to improve the load current quality.