Scaling Potential Analysis for the CMOS Compatible Ox-RRAM

This paper investigated the scalability potential of Ox-RRAM at advance technology nodes by considering the programing voltage, current and stability factors. The voltage mismatch issue become more serious as the technology become advance. High temperature forming scheme and array architecture optimization could alleviate this issue. The tail bit occurs during reading operation and high temperature retention, making the bit-error-rate increase. To ensure the stability of the memory chip, the programming current of the device needs larger than 100 μA, limiting the miniaturization of transistor size. The novel architecture should be designed to solve the tradeoff between reliability and density.