Write-In-Place Operation and It's Advantages to Upgrade the 3D AND-type Flash Memory Performances

Recently, we proposed a novel 3D AND-type Flash memory [1]-[3] architecture for 3D NOR Flash solution. In this work, we further propose a “write-in-place” (or “in-place write”) operation (like EEPROM) and demonstrate the feasibility. “Write-in-place” is to provide the same erase unit (page erase) as the program unit (page program). Thus to overwrite a page data the users just need one page erase followed by the page program, without the need to deal with a large erase unit (like NAND and NOR Flash memories). The in-place write does not require complex GC (garbage collection) algorithms by system controller, and can eliminate the write amplifications effect and improve the QoS (quality of service) of system performances. After optimization of BE-MANOS charge-trapping device, the in-place page write time can be minimized to around 110usec. Small neighbor-WL interferences, free from pattern loading effects and hot-carrier disturbs are merits of 3D AND architecture to enable write-in-place. We also suggest the future extensions of integrating ferroelectric memory FeFET device in the 3D AND architecture to further boost the in-place write speed to nearly 1 micro second at lower write voltages (~5V).