Electrical Analysis for Wafer-Bonded Interfaces of p+GaAs/n+InGaAs and p+InGaAs/n+InGaAs

We systematically investigated the wafer- bonded interfaces of p
⁺
GaAs/n
⁺
InGaAs and p
⁺
InGaAs/ n
⁺
InGaAs by using a circular transmission line method (CTLM) for the increased extraction accuracy. Based on the low-temperature bonding process at 50 °C, the bonded interfaces were successfully fabricated without degradation of the material quality. While the fabricated devices exhibited the linearly increased resistance as a function of channel distances, the p
⁺
InGaAs/n
⁺
InGaAs structure revealed the improved interfacial resistivity of 3.9×10
^-3
Ω·cm
²
compared with 3.3×10
^-2
Ω·cm
²
of the p
⁺
GaAs/n
⁺
InGaAs. Since these values suggested good electrical properties in wafer-bonded structures, the developed wafer-bonded interfaces could be a good approach for integrating electronic and optoelectronic devices.