Symbol Synchronizers in High-Speed Adaptive Receivers of Optical and Radio Frequency Range

When developing modern high-speed receivers, the problem of designing high-speed symbol synchronization systems is quite urgent. Usually these are open-loop systems, built according to the Feedforward algorithm without using additional synchronizing pulses (blind receiver). In this paper, a structural diagram of such an adaptive device for symbol synchronization is drawn up, algorithms for the functioning of its main blocks are selected and described: the block for determining the symbol frequency, the block for estimating and correcting the temporal position of the sample and the decimator. Simulation of signal processing in the digital part of a high-speed optical signal receiver with an information transmission rate of 100 Gbit/s, using DP-QPSK modulation and coding of each transmitted frame in accordance with the OTH hierarchy using standard FECs with different redundancy. Simulation confirmed the correct operation of the synchronization device and made it possible to obtain numerical indicators of the normalized synchronization error depending on the bit signal-to-noise ratio and the number of samples used. Based on the simulation results, it has been proven that the investigated symbol synchronization device retains its operability up to the signal-to-noise ratio of 10 dB. This is sufficient to provide a bit error rate of less than 10–3 even when using low position digital modulation without applying error correction coding.