An analysis of effects of device structures on retention characteristics in MFIS structures

Retention characteristics of Metal-Ferroelectric-Insulator-Semiconductor (MFIS) structures have been studied theoretically by considering currents through the ferroelectric and insulator layers. The simulations have successfully reproduced the memory retention curves, and agree well with experimentally obtained curves. The numerical results have indicated that a slight increase of Schottky barrier height of the ferroelectric layer provides sufficiently long retention time for practical use. The idea of inserting an insulator film between metal and ferroelectric layers has been also examined in order to cut off the currents through the ferroelectric layer. This Metal-Insulator-Ferroelectric-Insulator-Semiconductor (MIFIS) structure has been found to exhibit much longer retention time than the original MFIS.