Porting A Convolutional Neural Network For Stereo Vision In Hardware

With the leaps of progress done in the field of machine learning through the last few years, Artificial Neural Networks (ANN) are being used in more and more applications. In the field of computer vision, applications of ANNs include object recognition, motion and object tracking, and obstacle avoidance. Alternatively, ANNs are used to find the solutions of costly problems such as the construction of a depth map for stereoscopic vision. Significant research has been done using Field Programmable Gate Arrays (FPGAs) to accelerate the simulation of ANNs and achieve real-time execution. We seek to develop optimized hardware for embedded systems in order to run pretrained neural networks in real time. In this paper we analyze, reconstruct and reevaluate a pretrained convolutional neural network for stereo matching and develop a hardware architecture to be used in an FPGA so as to compute the stereo estimation of still images in real time in hardware.