Quantifying Region-Specific Hot Carrier Degradation in LDMOS Transistors Using a Novel Charge Pumping Technique

Since the 1970s, LDMOS transistors have been used in a variety of applications because of their versatility and monolithic integration with CMOS logic. Despite the advantages, interface defects (N
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) generation due to Hot Carrier Degradation (HCD) has been a persistent reliability challenge for LDMOS transistors. Unfortunately, neither classical charge pumping nor single-pulse charge pumping techniques can be used to locate/quantify N
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in a source-body-tied LDMOS configuration. Here we: i) identify the multiple hotspots of HCD in an LDMOS using experimentally validated TCAD simulations; ii) introduce and implement a TCAD-enabled novel charge pumping technique to probe region-specific interface states in a source-body-tied (SBT) LDMOS; and iii) develop a unified multi-hotspot HCD model to interpret the degradation kinetics in power transistors. The analysis provides deep insights into the HCD in an LDMOS and the generalized charge pumping technique can be used to map interface states in a variety of transistors with non-traditional doping and contact configurations.