Quantitative Design of Virtual Impedance for LVRT Strategy of VSG

The virtual synchronous generators (VSGs) face the risk of overcurrent when grid voltage sags occur. Although existing literatures have applied virtual impedance to VSG, aiming for suppressing overcurrent, rare papers mentioned how to meet the standards that the inverters output sufficient reactive power to power grid for low voltage ride-through (LVRT) strategy of VSG at the same time. In this paper, a quantitative design method of virtual impedance for LVRT strategy of VSG is proposed. In the LVRT strategy, the power loop is frozen first; then, the virtual impedance calculated by the proposed method is added to ensure the safe and stable operation during the voltage sags. The hardware-in-the-loop experimental results show that with the quantitatively designed virtual impedance, the overcurrent is avoided and the requirement of gird code for reactive current support is satisfied simultaneously, verifying the correctness and feasibility of the proposed quantitative design method of virtual impedance.