Hybrid Particle Swarm Optimization Algorithm for Area Minimization in 65 nm Technology

Analog design can be considered as a multidimensional optimization problem since it involves trade-offs between several circuit parameters. Various optimization techniques have been proposed to reduce the cycle time of analog design. We propose a hybrid particle swarm optimization algorithm with linearly decreasing inertia weight for the optimization of analog circuit design. The proposed method is validated in a differential amplifier circuit with a current mirror load. Promising simulation results demonstrate that the proposed method can significantly reduce the design time required for analog circuits.