Enhanced Postbond Test Architecture for Bridge Defects Between the TSVs

The use of through silicon vias (TSVs) is essential for vertically connecting the individual circuit layers of a 3-D IC. However, because the pitch between TSVs is being decreased, it becomes more vulnerable to bridge defects between the TSVs. In the previous architectures, the parallel topology between the power supply and the bridge defects reduces the resolution of the test results and makes them very sensitive to process variations. In this article, an enhanced postbond test architecture that improves the testability of bridge defects screening with a floating control circuit of supply voltage driver is proposed. The proposed structure allows the selective formation of a series circuit that includes the supply voltage driver and bridge defects between the TSVs; the structure can improve the output voltage resolution of the bridge defects by 27.2 times over that of the previous architectures. According to the experimental results, while exhibiting a proper test time, hardware overhead, and peak current consumption for mass production, the system guarantees testability for the detection of bridge defects. Moreover, the Monte Carlo simulation results show that the proposed architecture has a higher test reliability under process variations than the current test architectures.