A CMOS FPTA chip for intrinsic hardware evolution of analog electronic circuits

This paper describes and discusses an intrinsic approach to hardware evolution of analog electronic circuits using a Field Programmable Transistor Array (FPTA). The FPTA is fabricated in a 0.6 /spl mu/m CMOS process and consists of 16/spl times/16 transistor cells. The chip allows to configure the gate geometry as well as the connectivity of each of the 256 transistors. Evolutionary algorithms are to be run on a commercial PC to produce the new circuit configurations that are downloaded to the chip via a PCI card. In contrast to extrinsic hardware evolution all environmental conditions present on the device under test have to be taken into account by the evolutionary algorithm. Thus a selection pressure is raised towards solutions that actually work on real dice.