A CMOS Plasmon Detector with Different Body-Bias Voltages

A CMOS plasmon detector is proposed to improve dynamic range and sensitivity using different body-biased transistors. Three detectors biased at different body voltages are connected in parallel to the antenna, based on that the transistor has the highest voltage responsivity at the subthreshold region. The outputs are current-combined at the transconductance stage of the preamplifier for canceling the leakage signals. The complete detector IC consists of a detector core, a preamplifier, a main amplifier with a folded cascade structure, a biasing circuit and a differential integrated patch antenna. The proposed structure was fabricated with an area of 2.05 mm
²
using TSMC 0.25-μm CMOS technology. Post-simulation and measurement results show a wide dynamic range and high sensitivity compared to the detector using three equivalently biased transistors.