A High-Efficiency Isolated PFC AC–DC Topology With Reduced Number of Semiconductor Devices

A new three-level isolated ac–dc power factor correction (PFC) topology with a minimum number of semiconductor devices is the focus of this article. This topology provides a high input power factor (PF), soft-switching, and higher efficiency than existing isolated ac–dc converters. Furthermore, the proposed circuit has lower voltage rating requirements for the secondary side devices, which leads to a lower total cost and minimizes total converter losses. This article presents a theoretical analysis describing the complete characterization of this new topology, and experimental results on a 1-kW prototype showing high PF and efficiency throughout the operating range.