Implement Detail Enhancement Algorithm on FPGA for Real-Time and Energy-Efficient Embedded Systems

FPGA (Field Programmable Gate Array) is a platform that allows carrying out many digital signal processing designs with numerous benefits in terms of speed, energy consumption and flexibility. The first part of this paper introduces a method enhancing the contrast of an input image while simultaneously compressing the dynamic range of that one. The second part focuses on converting that algorithm into a digital design to run successfully on Xilinx FPGA. We also estimate the outcome on Zybo Z7 board of Digilent and achieve an impressive result with 120 fps for input/output images of resolution 640×512. In addition, fixed-point numbers operations offer a high precision in comparison with floating-point numbers in MATLAB, which brings high reliability in deployment.