New considerations for highly reliable PMOSFETs in 100 nm generation and beyond

The hot-carrier (HC) instability for surface channel PMOSFETs is investigated intensively. We found from experimental data that hot-carrier injection occurs at the channel center under the most serious stress condition of V/sub gs/=V/sub ds/ and that a physical mechanism similar to NBTI is responsible for degradation at room temperature, and confirmed from hydrodynamic simulations. We demonstrate that mechanical stress resulting from the sidewall spacer accelerates this anomalous degradation in short-channel PMOS under hot-carrier stress. We show that management of this degradation mechanism is indispensable for achieving high reliability in future generation PMOS devices.