A rate adaption gateway to the ISDN

A multistandard rate adapter coprocessor chip, designed for use in integrated services digital network (ISDN) terminal adapters and U-interface modems, is presented. It provides a compact low-power protocol convertor to connect asynchronous (up to 19200 b/s) and synchronous (up to 64 kbit/s) data terminal equipment with any digital 64-kbit/s network. The chip was developed in a 2- mu m CMOS technology using a hierarchical design methodology. The chip provides a compact cost- and power-efficient solution for universal-terminal adapter design. The rate adapter is the cornerstone of a 144-kbit/s U-interface modem and a major breakthrough for the next-generation multistandard terminal adapter.<
>