A New Architecture for Massive MIMO Testbed Laboratory in 5G

Massive MIMO (M. MIMO) is one of the main parts in 5G radio sections. It is constituted of a large number of antennas used in the TDD/FDD modes (32, 64 or even more antennas) and is capable to process information very fast. M. MIMO is constituted of high power / speed processors or FPGAs, switches and busses. Existing architectures in many research / university centers is based on a switched hierarchical architecture. In this paper while defining properties and requirements of a M. MIMO testbed and reviewing some M. MIMO architectures, introduce a new MIMO architecture other than switch base one which one of its properties is hardware saving and flexibility.