Phase Opposition Disposition PWM (POD-PWM) Strategy to Reduce WTHD Content from an NPC Inverter-Fed Electric Vehicle System

Neutral-point clamped Multilevel inverter (NPC-MLI) has transformed into a broadly accepted choice in the field of electric vehicle (EV) applications. In the traditional NPC-MLI-fed EV system, the problem regarding the higher harmonic content and the lower switching frequency still persists. In this paper, a phase opposition disposition pulse width modulation (POD-PWM) technique is proposed for a three-phase NPC-MLI, which is proficient in reducing the high-frequency weighted total harmonic distortion (WTHD) content of the inverter output voltage by employing a double Fourier integration-based harmonic mitigation algorithm. The experimental results of an FPGA-based NPC-MLI prototype hold a good resemblance with the theoretical analysis and simulated results. In addition, a comparative investigation affirms that the proposed strategy exhibits the highest efficiency and lowest WTHD content among all the previously-reported PWM schemes under study, which verifies the adaptability of the proposed work in electric vehicle applications.