Simulating Drain Lag of GaN HEMTs with physics-based ASM model

This paper presents a drain-lag model for GaN HEMTs, enhancing the simulation accuracy of the physics-based compact model ASM-HEMT. The proposed trap model requires a minimum number of measurements and simplifies the extraction procedure by focusing only on intrinsic device related parameters. It is shown that this drain-lag description allows for highly accurate simulation of pulsed I-V output curves for the whole range of gate voltage, providing high modeling accuracy of transistor large-signal behavior without adding complexity to the existing model.