A Novel High-Performance Planar InAs/GaSb Face-Tunneling FET With Implanted Drain for Leakage Current Reduction

In this article, a novel planar InAs/GaSb heterojunction face-tunneling FET (HFTFET) is proposed for device performance improvement. As is known in previous studies, the entire tunneling junction of HFTFET can be controlled by gate effectively and uniformly, and therefore, the large effective tunneling area and extremely steep turn on/off switch would be achieved. However, the leakage current between source and drain degrades the OFF-state characteristics and turn on/off switch greatly. Hence, an implanted drain is introduced in the proposed InAs/GaSb HFTFET for reducing the leakage to optimize the performance, which also makes the fabrication process compatible with the standard CMOS process platform. Consequently, large tunneling current, steep subthreshold swing, and small leakage current can be obtained simultaneously, which would further promote the development of tunnel field-effect transistors (TFETs) and their ultralow-power applications.