Identification of ZVS Points and Bounded Low-Loss Operating Regions in a Class-D Resonant Converter

This article presents an analysis of the different loss modes of the switching devices in a class-D series resonant converter operating with either fixed dead time or fixed duty cycle. A feasible operating region where the FETs in the inverter stage only exhibit reverse conduction losses, with no hard-switching, is identified. Furthermore, the impact of using a fixed dead time versus a fixed duty cycle is investigated. We find that using a fixed dead time is superior to using a fixed duty cycle, as a broader operating range can be achieved for the same losses, or the same operating range can be achieved with lower losses. A reduction in the reverse conduction losses of up to 59% or an expansion of the operational frequency range by 33% when using a fixed dead time is found. The modeling approach is validated on a 1-MHz prototype employing GaN switching devices. Lastly, a design example shows how the presented analysis can be used to determine the optimal fixed dead time/duty cycle for use with frequency modulation control such that the losses are minimized.