Simulation, Fabrication and Characterization of Zinc Oxide TFT

In this paper, ZnO thin film transistors were simulated and fabricated. The TFTs fabricated are of bottom gate configuration. Initially, the structure of the TFT is simulated by using Silvaco TCAD tool and the input and output characteristics are determined and the theoretical threshold voltage of the device is also calculated. Material characterization techniques such as SEM, XRD and EDS were performed to optimize the gate oxide layer and the oxide layer. The different materials are used in the fabrication of the thin film are Aluminium (Al) as the gate, source, and drain material. Aluminium oxide (Al
₂
O
₃
) as the gate oxide layer and Zinc Oxide (ZnO) as channel layers. PVD techniques such as sputtering and electron beam deposition are used to deposit the gate layer, gate oxide layer and the channel layer. Thermal evaporation is used to deposit the drain and source layer. After the deposition, the device is tested at a probing station to find out the input and output characteristics and verify if they match with the simulated values obtained from TCAD simulations.