Spin‐Torque‐Transfer (STT) MRAM Engineering

Spin‐torque transfer magnetoresistive random‐access memory (STT‐MRAM) is far more energy efficient than field MRAM. This chapter describes the memory operation and the performance of STT‐MRAM. It discusses energy barriers as a function of a magnetic tunnel junction (MTJ) film stack and device structure. The chapter focuses on the switching properties. The discussion starts from a simple uniform magnetization reversal model, called the Macrospin model, in which the magnetization of the entire MTJ free layer magnetization is assumed to precess in unison under spin current. Then, the chapter discusses two STT‐MRAM device reliability issues: tunnel barrier degradation and data retention. It covers an MgO tunnel barrier degradation model and the relation between the thermal energy barrier and the data retention time performance at the chip level. The chapter also discusses the 1 MTJ‐1 transistor MRAM cell design and scaling. It covers the SPICE model for memory chip‐level circuit simulation.