A DSP based technique for high-speed A/D conversion to generate coherently sampled sequences

This paper presents a digital signal processor (DSP) based device that digitizes a high speed analog signal. The device takes advantage of a new undersampling strategy which employs two clocks, rather than employing a traditional swept delay generator. The random access memory of the DSP and the signal processing capabilities are employed to so that the signal is sampled over an integer number of cycles, thus insuring coherency in the sampled data set. Coherency is important property that eliminates additional unwanted discontinuities in a data set which introduce unwanted artifacts in the signal's spectral content. An illustration of our new device is presented in this paper, in addition to laboratory measurements. The results also indicate that the new technique is competitive with solutions that exist in the current literature.