Oscillator Flicker Phase Noise: A Tutorial

A deep understanding of how to reduce flicker phase noise (PN) in oscillators is critical in supporting ultra-low PN frequency generation for the advanced communications and other emerging high-speed applications. Unfortunately, the current literature is either full of conflicting theories and ambiguities or too complex in mathematics, hiding the physical insights. In this brief, we comprehensively review the evolution of flicker noise upconversion theories and clarify their controversial and confusing parts. Two classes of such upconversion mechanisms in voltage-biased
$LC$
-tank oscillators (nMOS-only and complementary) are specifically compared and numerically verified using a commercial simulation model of 28-nm CMOS. We identify that non-resistive terminations of both 2nd and 3rd harmonic currents contribute to oscillation waveform asymmetries that lead to the flicker noise upconversion. Further, we discuss three
$1/f^{3}$
PN reduction mechanisms: waveform shaping, narrowing of conduction angle, and gate-drain phase shift.