Special Session: Exploring the Ultimate Limits of Adiabatic Circuits

The field of adiabatic circuits is rooted in electronics know-how stretching all the way back to the 1960s and has potential applications in vastly increasing the energy efficiency of far-future computing. But now, the field is experiencing an increased level of attention in part due to its potential to reduce the vulnerability of systems to side-channel attacks that exploit, e.g., unwanted EM emissions, power supply fluctuations, and so forth. In this context, one natural question is: Just how low can the energy dissipation from adiabatic circuits, and the associated extraneous signal emissions, be made to go? We argue that the ultimate limits of this approach lie much farther away than is commonly appreciated. Recent advances at Sandia National Laboratories in the design of fully static, fully adiabatic CMOS logic styles and high-quality energy-recovering resonant power-clock drivers offer the potential to reduce dynamic switching losses by multiple orders of magnitude, and, particularly for cryogenic applications, optimization of device structures can reduce the standby power consumption of inactive devices, and the ultimate dissipation limits of the adiabatic approach, by multiple orders of magnitude as well. In this paper, we review the above issues, and give a preliminary overview of our group's activities towards the demonstration of groundbreaking levels of energy efficiency for semiconductor-based logic, together with a broader exploration of the ultimate limits of physically realizable techniques for approaching the theoretical ideal of perfect thermodynamic reversibility in computing, and the study of the implications of this technology direction for practical computing architectures.