A Design of Four Dies Parallel NAND Flash Memory Controller Supporting Toggle and ONFI mode

The data access speed is an important index of the NAND Flash memory. This paper proposes a new structure which can implement high-speed data storage. One important feature of the controller is that one controller can operate four dies of NAND Flash memory at the same time. It improves the speed of data access effectively. The other important feature is that the controller can support both of the Toggle mode and ONFI mode. DDR protocol can achieve high rapid speed of storage. This design is attached to SOC system as AHB slave. The verification results demonstrate that this designed controller can correctly control NAND Flash memory to read, page program, reset, read ID, read status and block erase. The experimental results based on FPGA demonstrate that the speed of page program is 105.2MB/s. The read/write speed of the four dies parallel controller is 4 times better than the traditional controller.