A Two-ASIC Front-End for MEMS Accelerometers

This paper presents a two-chip front-end for bulk-silicon MEMS accelerometer applications. The front-end consists of two custom ASICs designed and optimized for high-precision applications. One of two ASICs is an interface chip, serving to detect the change of the differential capacitance of the sensor and convert it into voltage. The other ASIC is a 12-bit ADC which converts the output of the interface ASIC into digital code. Based on the proposed front-end, a second-order delta-sigma closed-loop MEMS accelerometer prototype is implemented to demonstrate the proposed front-end. A back-end algorithm is implemented in a FPGA to stabilize the closed loop. The FPGA generates a 1-bit data stream as the output of the accelerometer, which is sent to the interface ASIC as the feedback of the closed-loop system. Designed and fabricated in a 0.18 um process with high voltage options, the interface ASIC measures the sensitivity of 750 mV/pF and the ADC measures the effective number of bits of 9.3 bits. The closed-loop accelerometer achieves a noise floor of -80 dBg/√Hz and maximum input acceleration of ±2 g.