Area Optimization of Circuits Using Approximate Computing

Approximate computing can be applied to logic synthesis, known as approximate logic synthesis (ALS). ALS converts the original logic function into an approximate logic function with a more compact expression by introducing some acceptable errors, which can significantly reduce area, delay, and power consumption of the circuit. This paper proposes a novel ALS method that uses majority coverage to optimize the circuit area of the input circuit. The method primarily consists of two parts: one is to search for more compressed logical expressions with majority coverage, and the other is to use disjoint sharp products to separate error terms. The proposed method is implemented using the C programming language and tested with MCNC benchmarks. The experimental results show that the proposed method can also reduce the circuit area by 30.07% with an average error rate of 3.43% and that the proposed method is suitable for large function optimizations.