NoCSNN: A Scalable Interconnect Architecture for Neuromorphic Computing Systems

The immense computation and huge memory requirement are challenging the computation efficiency of today's systems. Consequently, neuromorphic systems have become a topical subject in research to mimic the brain's power efficiency and computational speed. There have always been certain major bottlenecks in the conventional architectures. In this paper, we develop a Network-on-Chip based Spiking Neural Network (NoCSNN), having a highly parallel architecture for the neuromorphic computing systems. It also benefits from the use of NoC in terms of scalability, latency and speed. The neurons in our proposed SNN model communicates through NoC architecture. Our proposed model consisting of 64 neurons is synthesized in 28nm technology node achieving a power dissipation of 29.22 mW and a die area of 1.61 mm². The NoC model is also explored in terms of latency, throughput and energy.