An Ultra-Low Power Level-Crossing ADC for ECG Monitoring Application

In this paper, a novel structure is proposed for implementing a fixed-window level-crossing analog-to-digital converter (LC-ADC) in which the activity and so the power consumption of the converter are considerably reduced. A pseudo synchronous implementation of this structure is proposed and designed for ECG monitoring application. Utilizing a single comparator and reducing the number of reference voltages are the other advantages of the proposed structure. Simulation results show an ultra-low power of 2.9 nW in .18 μm CMOS process using a 1.8 V supply voltage which makes it suitable for implantable biopotential-acquisition application.