Low-Voltage, Low Power, Low Area CMOS Current-Mode Divider Circuit

In this paper, a new analog CMOS current-mode divider is presented based on a new voltage controlled resistor. The proposed divider can be used in analog computation, fuzzy logic controllers (FLC), neural network, etc. The advantages of the improved structure are simplicity, wide bandwidth, wide dynamic range, low supply voltage requirements, low-power consumption and low active area. The post-layout simulations of the proposed divider implemented in a 0.18-□m CMOS process was performed with HSPICE software. In this case, supply was 0.9-V and divider has less than maximum 1% linear error. Also, the total power consumption was 42-□W at more than 350-MHz bandwidth and occupied area was about 370-□ m².