Reducing dynamic on-resistance of p-GaN gate HEMTs using dual field plate configurations

The dynamic ON-resistance (Ron) of p-GaN HEMTs was reduced using the dual field plate (FP) structure combined with the source field plate (S-FP) and gate field plate (G-FP). The electric field redistribution at the gate edge reduces the electron trapping during the high voltage blocking, avoiding the Ron increase after the device switching on. The devices with the dual FPs attained the breakdown voltage over 600 V, and the Ron increased only 50% after 200 V blocking, outperforming the devices with single FP or without FPs. Moreover, a plasma surface treatment process was introduced to further improve dynamic Ron performance, which is a promising method to alleviate the current collapse effect. The electric field distribution was also simulated using TCAD to support the experimental results. The results support the dual field plate design a useful structure for high-voltage GaN based HEMTs.