Noise Analysis of Charge-Balanced Readout Circuits for MEMS Accelerometers

This work presents an approach for a complete noise analysis and optimization flow for switched-capacitor MEMS readout frontend circuits. The flow starts with an early noise evaluation on a high abstraction level. The evaluation is performed using analytical calculations as well as simulations in MATLAB/Simulink. The presented approach is applied to a charge-balanced readout circuit example, which is eventually simulated at transistor level and measured. The results of the analytical calculations, the Simulink and the transistor-level simulations as well as the measurements are then compared showing the accuracy of the approach. Furthermore, an analysis is carried out on how to decrease the noise by identifying the most impacting parameters of the circuit and by evaluating the influence of a boxcar sampler in the charge-balanced readout circuit.