A Compact 281–319 GHz Low-Power Downconverter MMIC for Superheterodyne Communication Receivers

This article presents a fully integrated first downconversion stage for a superheterodyne receiver for high data rate communication at 300 GHz. It comprises a frequency multiplier-by-three, an active dual-gate downconverter, and an LNA. The chip was fabricated in a 35-nm InGaAs-based metamorphic high-electron-mobility transistor technology. The downconverter was designed to be used for different local oscillator (LO) frequencies between 70 and 80 GHz and intermediate frequency (IF) frequencies from 65 to 95 GHz, to create multiple channels for real-time full-duplex communication in the terahertz region. It achieves a conversion gain of 14 dB without IF amplification and 3-dB bandwidth of 25 GHz in the desired upper sideband from 288 to 313 GHz and an estimated NF of 6.6 dB. Without the LNA, the conversion gain of the circuit is -10 dB and it shows 3-dB bandwidth of 38 GHz in a frequency range from 281 to 319 GHz. Finally, the millimeter-wave monolithic integrated circuit (MMIC) will be compared in detail to a similar state-of-the-art downconverter using a resistive mixer and a necessary additional LO buffer stage in the same technology targeting the identical application. While exhibiting a better conversion gain and bandwidth and occupying only 40% of chip area, the presented downconverter consumes 70% less dc power than the MMIC with a resistive mixer.