FPGA-Based Short Horizon Integration Voltage Reconstruction Method for Three-Level Neutral Point Clamped Inverter

In this article, a real-time short horizon integration voltage reconstruction method based on field programmable gate array (FPGA-based) is proposed for the three-level neutral point clamped (NPC) inverter. It uses real driving signals obtained by FPGA's internal signals to rebuild the inverter's phase voltages. First, auxiliary driving signals are rebuilt according to the phase-current directions. They differ from real driving signals in that the effects of operations such as adding the dead time (DT) and eliminating narrow pulses (NP) is removed. Then, the output voltage within each synchronous clock pulse is reconstructed by the integration of the instant voltage, which is computed by the dc-bus voltage and auxiliary switching states determined by auxiliary driving signals. The equivalent voltage in each switching period can also be obtained by the integration of the instant voltage. Compared with other methods, it is universally suitable for various pulsewidth modulation (PWM) methods regardless of whether the NP is eliminated or the DT is added in these PWM methods. Meanwhile, it ensures that the reconstructed voltage is consistent with the actual output voltage at a low cost. Its effectiveness is verified by simulations and experiments.