Transfer Learning with Bayesian Optimization-Aided Sampling for Efficient AMS Circuit Modeling

A traditional analog mixed-signal (AMS) design mostly relies on the designer's knowledge and can only afford exploring over a narrow design space due to expensive SPICE simulation. However, a neural network (NN)-based model of an AMS circuit potentially enables fast exploration of the design space thanks to its low computation cost. Unfortunately, to build an NN model with sufficient accuracy, a training dataset is needed, incurring SPICE simulations during different design phases. Therefore, it is prudent to train it with a larger dataset in an earlier design phase (e.g. schematic design) but a significantly reduced dataset in a later design phase (e.g. post-layout design or migration to more advanced technology node), as simulation cost increases sharply in later design phases. In this paper, we propose the use of transfer learning (TL) with Bayesian optimization-aided sampling (BOAS) to reduce the required size of training datasets for NN models in later design phases. To prove the concept, we show that 150X and 17X dataset reductions are possible for a digital-to-analog converter (DAC) in the post-layout design phase and an amplifier in the technology migration phase, respectively.