Modeling of Electrical Properties of Al-on-Ge-on-Si Schottky Barrier Diode

In this work, different mechanisms that could cause degradation of the ideality factor in Al/Ge Schottky diodes on Si substrate are examined. Measured I-V characteristics of Schottky diodes have been fitted by the model of the diode developed in TCAD environment. The effects of Shockley-Read-Hall recombination parameters of epitaxial Ge on the I-V characteristics are simulated. The impact of interface traps on both Al/Ge and Ge/Si interfaces, as well as the effect of a buffer oxide layer on Al/Ge interface are analyzed by simulations providing a possible explanation for a degraded ideality factor in Al/Ge-on-Si Schottky diodes.