Determination of Fault Clearing Time based on Thermal Limits of Power Semiconductor Devices in DC Microgrids

During fault in dc system, the gate signal of semi-conductor switches are blocked by their internal protection. However, the high current continues to flow through the anti-parallel and free-wheeling diodes and required to be clear before the converters get damaged. According to literature, the critical clearing time is defined as the duration in which converter output voltage goes to zero and current starts to flow through anti-parallel diode in converters. This condition provides very low value of clearing time and hence requires fast detection and isolation methods. In this paper, the critical clearing time is redefined by considering the electro-thermal model of semiconductor devices used in converters. Three different two-level converters viz., VSC, dc-dc buck and boost converters are considered in DC microgrid under this work. Further, the speed of the existing fault detection and isolation methods are compared with the derived fault clearing time. The presented approach also provides a guideline for the selection of suitable protection scheme for a given dc system.