LDPC Matrix Analysis for Short Packet Transmission in Factory Automation Scenarios | IEEE Conference Publication | IEEE Xplore

LDPC Matrix Analysis for Short Packet Transmission in Factory Automation Scenarios


Abstract:

Critical application requirements proposed for Factory Automation scenarios involve demanding and simultaneous restrictions in reliability and latency. Channel coding is ...Show More

Abstract:

Critical application requirements proposed for Factory Automation scenarios involve demanding and simultaneous restrictions in reliability and latency. Channel coding is a basic tool to guarantee reliability but it usually involves high computation and memory resources at both transmitting and receiving sides. Among all the possible choices, Low Density Parity Check codes provide outstanding correction capacity. This paper studies two different LDPC coding approaches: 5G New Radio (5G NR) and IEEE 802.11 (WLAN). One of the drawbacks of LDPCs is their degraded performance and complex matrix adaptation for short information packets. Both 5G and 802.11 LDPCs use Quasi-Cyclic LDPC as the adaptation technique for matching the data packet size and coding matrix dimension. This paper evaluates 5G and 802.11 LDPC techniques, analyzing their structure and reliability performance for very short information messages by means of simulations. The results show that 5G NR LDPC is 1 dB closer to the Shannon limit than WLAN LDPCs, but this gain is lost for short message lengths as the ones used in Factory Automation environments. However, latency results are promising due to the opportunity of combining the analyzed techniques with new MAC techniques in order to achieve the desired reliability while not affecting latency dramatically.
Date of Conference: 15-16 October 2020
Date Added to IEEE Xplore: 04 November 2020
ISBN Information:
Conference Location: St. Petersburg, Russia

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