Characterization and investigation of the interaction between hot electron and electrostatic discharge stresses using NMOS devices in 0.13 /spl mu/m CMOS technology

In this paper, the high-current characteristics encountered during electrostatic discharge (ESD) events using NMOS/Lnpn protection devices in a 0.13 /spl mu/m CMOS technology are investigated for different device parameters. The effects of silicide blocking and hot electron (HE) shifts on the second breakdown current of the NMOS devices are studied. The impact of nondestructive ESD stressing on HE shifts is also studied for both silicided and nonsilicided devices.