Logical Unit Design using Reversible HSG1 Gate and Its Application in ALU Design

Due to reduced size and increase in component density, controlling heat dissipation is becoming a big challenge for chip designers and manufacturers and thus researchers, scientists, and engineers throughout the world are looking for newer technologies for remedy. One such technology that is providing a solution to the above-stated problem is Reversible Logic Technology (RL T). RLT is a new paradigm and finding its application in Quantum Computing, Nano-Electronics, Cryptography, Low-Power Low-Dissipation circuit designs. In this paper based on RLT, 16×16 Harsh Shiva Gate 1 (HSG1) is proposed. HSG1 gate can be programmed for performing 16, 1024, and 16384 logical output operations using 4, 10, and 14 programmable input pins respectively on two operand A and B in a single clock cycle. HSG1 gate has 2 Output Modes - Simultaneous and Cascade Mode. In Simultaneous Mode, a total of 14 programmable and 2 operand input pins are available for performing 65536 logical output operations at the output pins from x0 to x15. While in Cascade Mode, based on 4 selection input pins, X, Y, N, and P, 16 logical output operations are performed at the output pin LOUT. The main advantage of cascade mode is using LOUT as the input to the control unit of ALU when HSG 1 gate is used as a logical unit in designing of ALU. It has been also proved that the proposed HSG1 gate is better than its counterpart for implementing logical unit in terms of garbage output, the number of gates, and logical operations to be performed. All the results have been verified using VHDL simulation.