An Integrated Full-Duplex/FDD Duplexer and Receiver Achieving 100MHz Bandwidth 58dB/48dB Self-Interference Suppression Using Hybrid-Analog-Digital Autonomous Adaptation Loops

This paper presents a 1.5-to-2 GHz CMOS electrical-balance duplexer and receiver supporting both frequency-division duplexing (FDD) and in-band full-duplex (IBFD) operations. The proposed multi-tap and multi-stage RF and analog self-interference cancellation adapts itself autonomously to a time-varying channel in real time using a new on-chip hybrid-analog-digital adaptation loop. A
$G_{m}-C$
-based reconfigurable frequency shift is utilized to support FDD operation. In measurement, 58dB and 48dB RF/analog self-interference suppression are achieved across a 100MHz bandwidth in the IBFD and the FDD mode, respectively. Using the proposed embedded adaptation loops, <50µs adaptation is achieved without any high-speed ADC or DSP.