A versatile CMOS low-noise analog front-end stage for solid state detector interfaces

A front-end stage has been designed for use in solid state detector systems. Its novelty lies in the fact that the preamplifier stage provides dual mode outputs: i) a voltage step that corresponds to the total integrated charge and ii) a fast differential signal that corresponds to the current pulse released by the detector. The first output signal is processed by a S-G shaper and used for low/medium rate, low noise applications (peaking time 100 ns, ENC=300e @3pF external capacitance). The second one is used for high rate applications (peaking time 40 ns. ENC=440e @3pF external capacitance). It is intended for use in a luggage inspection system where X-ray radiation is directly converted to charge employing CdTe detectors. The circuit has been implemented in a 0.6 /spl mu/m CMOS process.