A 65 nm CMOS Switched-Capacitor Carrier Aggregation Transmitter

This paper presents a new carrier aggregation transmitter architecture with high linearity performance based on series post-PA combining of two switched-capacitor power amplifiers (SCPA), each operating at a different carrier frequency. Linear operation is achieved through the low and digital code word independent output impedance of the SCPA, resulting in low nonlinear interaction between the SCPAs comprising the transmitter. The transmitter operates around the center frequency of 2.4 GHz with a 3 dB bandwidth of 600 MHz and achieves 18.5% peak PAE at a maximum output power of 19 dBm. Carrier to third-order intermodulation distortion product is >40 dBc at 9 dB power backoff within a carrier spacing range larger than 250 MHz. The chip was fabricated in TSMC's 65 nm CMOS, and it occupies an area of 1.6 mm².