Vₜ Extraction Methodologies Influence Process Induced Vₜ Variability: Does This Fact Still Hold for Advanced Technology Nodes?

In this work, we have investigated the influence of V_t extraction procedure on overall V_t variability of sub-10 nm W_fin FinFETs. Using six different V_t extraction techniques, we have experimentally demonstrated that the V_t variability is independent of V_t extraction procedure (unlike reported earlier). Furthermore, through systematic evaluation on commonly used V_t extraction techniques, the physics behind this anomalous behavior is investigated. It is shown that the significant variation in metal gate work-function and gate dielectric charges in advanced CMOS nodes is mainly responsible for this behavior. This claim is further validated for FinFETs with deeply scaled fin-width and effective oxide thickness (EOT).